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Continuous assignments are the most basic assignment in dataflow modeling. Continuous assignments are used to model in combinational logic. It drives values into the nets.
net [strength] [range] [delay] identifier = net or register ;
assign [strength] [delay] net = net or register ;
Continuous assignments provide a way of modeling combinational logic at a higher level of abstraction than Gate-Level logic. It allows the use of Boolean logic rather than gate connections.
The left-hand side of an assignment is a variable to which the right-side value is to be assigned and must be a scalar or vector net or concatenation of both. The right-hand side of an assignment, separated from the left-hand side by the equal (=) character, can be a net, a reg or any expression that evaluates a value including function calls.
Continuous assignments drive values into the nets whenever the right-hand side value changes, this means continuous assignments are always active and assignments occur whenever the right-hand side operands changes. It drives both vector and scalar.
Continuous assignments can be used in two ways: as the net declaration statement and as the continuous assignment statement.
In a continuous assignment statement, after the assign keyword (Example 1) the net is declared as the left-hand side and after the equal (=) character, the right-hand side is declared as an expression. The value of out changes whenever the values of operands In_1 or In_2 change.
Example 2 shows how to use continuous assignments with vectors. The left-hand side of an assignment is a vector net, while the right-hand side operands are vector registers.
The left-hand side of an assignment can also be a concatenation of nets. Example 3 describes this use.
Instead of the continuous assignment statement, the net declaration assignment can be used. This means that in the net declaration statement we can assign expressions that occur whenever right-hand side operands change. In this case, assign keyword is not used. Example 1can be described as shown in Example 4. In this case a net can be declared only once, therefore only one net declaration assignment can be made to a net.
An optional delay given to a continuous assignment specifies the time duration between the right-hand side operand value change and the assignment to the left-hand side. Delay specification can be used both in the continuous assignment statement and the net declaration statement (see Example 5 and Example 6).
Also optional is strength specification. Example 7 shows a way to specify strength in a continuous assignment. For more information about strength see the "Strength" chapter.
Example 1
wire out;
assign out = In_A & In_B ;
Continuous assignment 'out' is a net. Both In_1 and In_2 are nets.
Example 2
assign address[7:0] = address_1[7:0] ^ address_2[7:0] ;
Continuous assignment with range specification. Address_1 and address_2 are 8-bit vector registers.
Example 3
assign {c_out, sum[7:0]} = Data_A[7:0]+Data_B[7:0]+c_in;
Continuous assignment with concatenation.
Example 4
wire out = In_A & In_B ;
The net declaration assignment. Equivalent to Example 1.
Example 5
assign #25 out = In_A & In_B ;
Delay specification in the continuous assignment statement.
Example 6
wire #25 out = In_A & In_B ;
Delay specification in the net declaration assignment.
Example 7
assign (strong1, pull0) out = Data_A | Data_B ;
Continuous assignments cannot be used within initial or always blocks.
Continuous assignment statements can be used on a net that has been previously declared
Only one net declaration assignment can be used for a net.
More than one continuous assignment statement can be made to a net.
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