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An interface constant declared in the block header of a block statement, a component declaration, or an entity declaration. Generics provide a channel for static information to be communicated to a block from its environment. Unlike constants, however, the value of a generic can be supplied externally, either in a component instantiation statement or in a configuration specification.
generic ( generic_interface_list ) ;
Generics support static information to blocks in a similar way as constants, but unlike the constants the values of generics can be supplied externally. Similar to ports, they can be declared in entities and component declarations, and always before ports.
Values supported by generics declared in an entity can be read either in entity or in architecture associated with the entity. In particular, a generic can be used to specify the size of ports (example 1), the number of subcomponents within a block, the timing characteristics of a block (example 2), physical characteristics of a design, width of vectors inside an architecture, number of loop iterations, etc. In general, generic can be treated inside an architecture in the same way as constant.
Example 1
entity CPU is
generic
(BusWidth : Integer := 16);
port(DataBus : inout
Std_Logic_Vector(BusWidth-1 downto 0));
. . .
The generic value BusWidth is used here to declare the width of the
port DataBus, and can be successively in all declarations of buses
inside associated architecture(s). This way the user supplies only
one value, which parameterizes complete design.
Example 2
entity Gen_Gates is
generic (Delay : Time := 10 ns);
port (In1, In2 : in Std_Logic;
Output : out Std_Logic);
end Gen_Gates;
architecture Gates of
Gen_Gates is
begin
. . .
Output <= In1 or
In2 after Delay;
. . .
end Gates;
The Delay generic value Delay specifies here the delay through a
device or part of the device.
In most synthesis tools only generics of type integer are supported.
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