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Table of Contents
Access Type
Aggregate
Alias
Allocator
Architecture
Array
Assertion Statement
Attributes (predefined)
Attributes (user-defined)
Bit
Bit_Vector
Block Statement
Boolean
Case Statement
Character Type
Component Declaration
Component Instantiation
Composite Type
Concatenation
Configuration Declaration
Configuration Specification
Constant
Delay
Driver
Entity
Enumeration Type
Event
Exit Statement
Expression
File Declaration
File Type
Floating Point Type
Function
Generate Statement
Generic
Group
Guard
Identifier
If Statement
Integer Type
Library Clause
Literal
Loop Statement
Name
Next Statement
Null Statement
Operator Overloading
Operators
Package
Package Body
Physical Type
Port
Procedure
Process Statement
Range
Record Type
Report Statement
Reserved Word
Resolution Function
Resume
Return Statement
Scalar Type
Sensitivity List
Signal Assignment
Signal Declaration
Slice
Standard Package
Std_Logic
Std_Logic_1164 Package
Std_Logic_Vector
String
Subtype
Suspend
Testbench
Type
Type Conversion
Use Clause
Variable Assignment
Variable Declaration
Vector
VITAL
Wait Statement
Waveform

Standard Package

Definition:

The STANDARD package predefines a number of types, subtypes, and functions which are visible to all design units.

Description

The STANDARD package is a part of the Language Specification. It defines basic types, subtypes, and functions, together with operators available for each of the (sub)types defined. The operators are specified implicitly. Below is a complete list of declared types, together with their predefined operators.

Contents:

The STANDARD package declares following types:

  • BOOLEAN (with predefined operators "and", "or", "nand", "nor", "xor", "xnor", "not", "=", "/=", "<", "<=", ">", ">="),

  • BIT (with predefined operators "and", "or", "nand", "nor", "xor", "xnor", "not", "=", "/=", "<", "<=", ">", ">="),

  • CHARACTER (with predefined operators "=", "/=", "<", "<=", ">", ">="),

  • SEVERITY_LEVEL (with predefined operators "=", "/=", "<", "<=", ">", ">="),

  • INTEGER (with predefined operators "=", "/=", "<", "<=", ">", ">=", "+", "-", "abs", "*", "/", "mod", "rem", "**"),

  • REAL (with predefined operators "=", "/=", "<", "<=", ">", ">=", "+", "-", "abs", "*", "/", "**"),

  • TIME (with predefined operators "=", "/=", "<", "<=", ">", ">=", "+", "-", "abs", "*", "/"),

  • STRING (with predefined operators "=", "/=", "<", "<=", ">", ">=", "&"),

  • BIT_VECTOR (with predefined operators "and", "or", "nand", "nor", "xor", "xnor", "not", "sll", "srl", "sla", "sra", "rol", "ror", "=", "/=", "<", "<=", ">", ">=", "&"),

  • FILE_OPEN_KIND (with predefined operators "=", "/=", "<", "<=", ">", ">="),

  • FILE_OPEN_STATUS (with predefined operators "=", "/=", "<", "<=", ">", ">="),

and three subtypes:

  • DELAY_LENGTH (subtype of TIME),

  • POSITIVE (subtype of INTEGER),

  • NATURAL (subtype of INTEGER),

See Boolean, Bit, Character, Integer, Real, Physical Types, String, Bit_Vector and File for details on respective types.

Important Notes

  • Use of the STANDARD package is implicitly assumed by every VHDL simulator and compiler and need not to be explicitly declared by the 'use' clause.

  • The user may not modify the contents of the package.

 

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