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VITAL
Wait Statement
Waveform

Waveform

Definition:

A series of transactions, each of which represents a future value of the driver of a signal. The transactions in a waveform are ordered with respect to time, so that one transaction appears before another if the first represents a value that will occur sooner than the value represented by the other.

Syntax:

waveform ::= waveform_element { , waveform_element }

| unaffected

waveform_element ::= value_expression [ after time_expression ]

| null [ after time_expression ]

Description

The waveform statement appears on the right-hand side of the signal assignment statement. It supports new values for the signal, possibly together with expected delays when the changes of the values will take effect. Alternatively, in concurrent signal assignments, the reserved word unaffected can be used instead of new values.

Each waveform element is composed of an expression whose value will be assigned to the signal driver and optional time expression is defined following the reserved word after. The type of the expression appearing in the waveform element must be the same as the type of the target signal (Example 1).

If there is no time expression specified in the waveform element of the signal assignment statement, then the time delay is implicitly delcared as after 0 ns (Example 2).

An expression in a waveform can be substituted by the value null. This value can be assigned only to signals declared as guarded, additionally with a resolution function (Example 3).

If the reserved word unaffected is used as a waveform in a concurrent signal assignment, it is equivalent to a process executing a null statement.

Evaluation of a waveform element produces a single transaction, i.e. a pair: new value for a signal and time when this value will be assigned. The time is determined by the current simulation time added to the value of time expression in the waveform element.

Examples

Example 1

signal D_OUT, E_OUT : BIT_VECTOR (3 downto 0);
.............................
D_OUT <= "0000" after 2 ns;
E_OUT <= "0000" after 2 ns, "1111" after 7 ns;

 
In the first signal assignment statement the "0000" value will be assigned to the driver D_OUT after 2ns. In the second assignment, first the "0000" value will be assigned to the E_OUT after 2ns and then after additional 5 ns the signal will be assigned the "1111" value.

Example 2

C_OUT <= 'X';
if C_OUT = 'X' then ...

 
Although the signal assignment will take place "after 0 ns", it is not immediate and when the if statement is executed, C_OUT will still have its value unchanged. Update of the C_OUT signal will take place at the end of simulation cycle, i.e. when the process is suspended.

Example 3

architecture test_null of test is
function res_fun (res_val: bit_vector) return bit is
begin
  for i in res_val'RANGE loop
    if res_val (i) = '1' then return '1';
    end if;
    return '0';
  end loop;
end res_fun;
signal H : res_fun BIT register;
begin
P1: process
begin
  A1: H <= '1' after 10 ns, null after 20 ns;
end process P1;
P2: process
begin
  A2: H <= '1' after 5 ns, '0' after 10 ns;
end process P2;
end architecture test_null;

 
When the signal assignment statements A1 and A2 are executed:

  • two transactions are placed in driver of the signal H in process P1 ('1' after 10 ns), (null after 20 ns) and

  • two transactions are placed in driver of the signal H in process P2 ('1' after 5 ns), ('0' after 10 ns)..

This means that the value of the signal H at 5 ns is determined by the resolution function with the value from process P2 equal to '1' and the value from process P1 equal to '0'. After 10 ns the resolution function will be called with '1' from process P1 and '0' from process P2. After 20 ns the resolution function will be called with a vector containing only one element ('0', contributed by process P2) as the driver from the process P1 is disconnected.

Important Notes

  • The delay values supported with the after clause do not cumulate, but all relate to the same simulation time (compare Example 1).

 

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