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Table of Contents
Bit-select
Block Statements
Built-in Primitives
Case Statement
Continuous Assignments
Conversion Functions
Comments
Compiler Directives
Concatenations
Conditional Operator
Delays
Disable Statement
Display Tasks
Edge Sensitive Path
Expression Bit Length
File I/O Functions
Functions
Identifiers
If Statement
Integer Constants
Intra-assignment Timing Controls
Keywords
Loop Statements
Memories
min:typ:max Delays
Module Declaration
Module Instantiation
Module Path Declaration
Module Path Polarity
Net Data Types
Operators
Parameters
Part-select
PLA Modeling Tasks
Probabilistic Distribution Functions
Procedural Assignments
Procedural Continuous Assignments
Procedural Timing Control
Range Specification
Real Constants
Register Data Types
Simulation Control Tasks
Simulation Time Functions
Specify Block
State Dependent Path
Stochastic Analysis Tasks
Strengths
Strings
Structured Procedures
Tasks
Timescale System Tasks
Timing Check Tasks
UDP Declaration
UDP Instantiation
UDP State Table
Value Change Dump (VCD) File
Vectors

Block Statements

Formal Definition

The block statements provide a means of grouping two or more statements in the block.

Simplified Syntax

begin : name

  statement;

  ...

end

fork : name

  statement;

  ...

join

Description

The Verilog HDL contains two types of blocks:

  • Sequential (begin-end blocks).

  • Parallel (fork-join blocks).

These blocks can be used if more than one statement should be executed.

All statements within sequential blocks (Example 1) are executed in the order in which they are given. If a timing control statement appears within a block, then the next statement will be executed after that delay.

All statements within parallel blocks (Example 2) are executed at the same time. This means that the execution of the next statement will not be delayed even if the previous statement contains a timing control statement.

Examples

Example 1

begin
  a = 1;
  #10 a = 0;
  #5 a = 4;
end

During the simulation, this block will be executed in 15 time units. At time 0, the 'a' variable will be 1, at time 10 the 'a' variable will be 0, and at time 15 (#10 + #5) the 'a' variable will be 4.

Example 2

fork
  a = 1;
  #10 a = 0;
  #5 a = 4;
join

During the simulation this block will be executed in 10 time units. At time 0 the 'a' variable will be 1, at time 5 the 'a' variable will be 4, and at time 10 the 'a' variable will be 0.

Example 3

fork
  a = 1;
  @(b);
  a = 0;
join

During the simulation when this block is executed 'a' becomes 1 and when a change occurs on 'b', then 'a' changes to 0. Flow of the procedural block is suspended when the @(b) statement is reached awaiting a change in value of 'b' before procedure block activities resume.

Important Notes

  • In parallel blocks all statements are executed at the same time, so there must not be any mutual dependent assignments.

 

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